Capacitors and RC Behaviour

• Capacitance stores charge, and resists voltage changeA capacitor holds charge proportional to the voltage across it. The consequence that matters in practice: the voltage across a capacitor cannot change instantaneously, because that would require infinite current. This is why capacitors smooth supplies and why they slow down edges.Q = C x V, and I = C x dV/dt.
• The RC time constantCharge a capacitor through a resistor and the voltage approaches its final value exponentially. One time constant tau = RC gets you 63% of the way; five time constants is conventionally 'settled' (99.3%).tau = R x C. V(t) = Vfinal + (Vstart - Vfinal) x e^(-t/tau). 5 tau = settled.
• RC as a filterThe same circuit viewed in the frequency domain is a first-order low-pass filter. Below the corner frequency signals pass; above it they roll off at 20 dB per decade. Swap R and C and you get a high-pass.f_c = 1 / (2 x pi x R x C).
• Dielectrics change everythingC0G/NP0 is stable and tiny in value. X7R and X5R are the workhorses but lose capacitance with DC bias, temperature and age. Electrolytics are cheap bulk with high ESR and a lifetime spec. Tantalum and polymer sit in between. Choosing the wrong dielectric is a real, common, hard-to-debug failure.An 0603 10 uF X5R rated 16 V can lose 60-80% of its capacitance at 5 V DC bias.
• Voltage rating and deratingNever operate a ceramic capacitor near its rated voltage. Common practice is to derate to 50% of rating for X7R/X5R, and further for high-reliability work. Electrolytics also derate, and their ripple-current rating is often the real limit rather than voltage.Rule of thumb: choose Vrated >= 2 x Vapplied for ceramics.
• ESR, ESL and self-resonanceA real capacitor is a capacitance in series with a small resistance (ESR) and inductance (ESL). Above its self-resonant frequency it behaves as an inductor and stops decoupling. This is the whole reason decoupling networks use several values and small packages.Smaller package = lower ESL = higher self-resonant frequency. 0402 beats 0805 for high-frequency decoupling.

ProblemA mechanical button bounces for up to 5 ms. It pulls a node to ground; a 10 k resistor pulls it to 3.3 V. Choose C so the node is filtered enough that a Schmitt-trigger input sees one clean edge, and check the release time is acceptable for a 20 ms keyscan.

1. 1
   The filter must be slow relative to the bounce: aim for tau of roughly the same order as the bounce duration, say tau ~ 5 ms.
2. 2
   tau = RC, so C = tau / R = 5e-3 / 10e3 = 500 nF. Round to the E12 value 470 nF.
3. 3
   Actual tau = 10k x 470n = 4.7 ms.
4. 4
   Release (charging through 10 k toward 3.3 V): the Schmitt positive threshold on a 3.3 V CMOS part is roughly 0.7 x Vcc = 2.3 V. Time to reach it = -tau x ln(1 - 2.3/3.3) = -4.7 ms x ln(0.303) = 5.6 ms.
5. 5
   5.6 ms is comfortably under a 20 ms scan interval. Acceptable.
6. 6
   Now check the press: the button shorts C to ground directly, so discharge current is limited only by contact resistance. Peak current could be amps, welding the contacts over time.
7. 7
   Add a 220 ohm series resistor between the button and the capacitor. Discharge tau becomes 220 x 470n = 103 us — still far faster than the 5 ms bounce, so filtering is unaffected, but peak current is now 3.3/220 = 15 mA.

Answer10 k pull-up, 470 nF to ground, 220 ohm in series with the button. Bounce filtered with tau = 4.7 ms, release edge at 5.6 ms, contact current limited to 15 mA.

Tool: ngspice transient analysis

• Create rc.cir:

  RC step response
  V1 in 0 PULSE(0 3.3 0 1n 1n 20m 40m)
  R1 in out 10k
  C1 out 0 470n
  .tran 10u 40m
  .end

• Run interactively: ngspice rc.cir
• At the ngspice prompt type: run
• Then: plot v(in) v(out) — a plot window opens showing the square input and the exponential output.
• Use the cursor to find the time at which v(out) reaches 0.63 x 3.3 = 2.08 V. It should be about 4.7 ms, your calculated tau.
• Type: meas tran tau_meas WHEN v(out)=2.08 RISE=1 — ngspice prints the measured value. Compare to RC.
• Change C1 to 47n and re-run. Confirm tau drops by exactly 10x.
• Add an AC analysis to see the same circuit as a filter: replace the source line with 'V1 in 0 AC 1' and the analysis with '.ac dec 20 1 1meg'. Then: plot db(v(out)). Find the -3 dB point and compare to 1/(2*pi*R*C) = 33.9 Hz.

• AC Electrical Circuit Analysis (Fiore) - Capacitance chapteropen licencereading~120 minOpen textbook. Read the capacitance chapter and the RC transient chapter; skip the phasor material for now, it comes back later.
• All About Circuits - DC Volume, Capacitors chapterfreereading~45 minGood intuition-building on charge storage and the transient curve.
• Murata SimSurfing / capacitor DC bias characteristicsfreeinteractive~30 minFree (proprietary) manufacturer tool. Plot capacitance vs DC bias for a real MLCC part number and see the derating with your own eyes. There is no open-source equivalent with real measured part data.
• Kemet / TDK capacitor dielectric comparison notesopen licencereference~20 minThe Class 1 vs Class 2 dielectric section explains C0G, X7R, X5R, Y5V and their tempcos concisely.

Design and characterise a two-stage supply filter and a button debounce for a small 3.3 V digital board. You must justify every capacitor by dielectric, package and voltage rating, not just by value.

Deliverables

• An RC low-pass filter for a noisy 3.3 V sensor rail, specified to attenuate a 100 kHz switching ripple by at least 30 dB while dropping less than 50 mV DC at a 20 mA load. Show the calculation for both the corner frequency and the DC drop, and state the trade-off.
• A button debounce circuit, fully calculated as in the worked example, including the contact current-limit resistor.
• An ngspice transient simulation of the debounce that injects a realistic bounce pattern (use a PULSE or PWL source with several fast transitions) and shows the filtered output crossing a threshold exactly once.
• An ngspice AC analysis of the supply filter, with the -3 dB frequency and the attenuation at 100 kHz read off the plot and compared to hand calculation.
• A component selection table: for every capacitor, give package, dielectric, rated voltage, applied voltage, and the derated effective capacitance you expect in circuit.

Acceptance criteria — how you know it is good enough

• Every capacitor has a stated dielectric and a rated voltage at least 2x the applied voltage.
• The DC bias derating of at least one X5R/X7R part is acknowledged with a real number from a manufacturer curve.
• The debounce simulation demonstrably produces a single clean threshold crossing from a multi-transition input.
• The filter's measured (simulated) -3 dB point is within 10% of the hand calculation.
• The DC drop across the filter resistor at full load is calculated and within the 50 mV budget.

If you want to push further

• Replace the RC supply filter with an LC and compare the attenuation at 100 kHz. Identify the new risk you have introduced (hint: resonance).
• Simulate the effect of the X5R losing 60% of its capacitance at bias, and state whether your filter still meets spec.

• I can calculate an RC time constant and sketch the charge/discharge curve from memory.
• I can convert between a time constant and a filter corner frequency in both directions.
• I can explain why a capacitor's voltage cannot change instantaneously and what that implies for current.
• I can choose between C0G, X7R, X5R and electrolytic for a given job and defend the choice.
• I know the ceramic derating rule and can look up a real part's DC bias curve.
• I can explain what self-resonance is and why decoupling uses small packages.