Lab & instruments7 hours total3 h on the project

Oscilloscope and Logic Analyser

Capture and interpret time-domain signals: set up triggers deliberately, choose probe and ground connections that do not lie to you, and decode a digital bus.

Learning material0/20
Project0/11
Competence checklist0/6

Two ways in. Work the material, or if you already know this, go straight to the project and prove it.

How this skill is structured

  1. 1. Concepts — the ideas stated plainly, with the equations worth memorising.
  2. 2. Worked example — one real problem solved end to end, numbers included.
  3. 3. Tool demonstration — do the thing in a real open-source tool.
  4. 4. Resources — the specific free readings and videos, and what part of each to use.
  5. 5. Project — built alone, producing something a reviewer can check.
  6. 6. Competence checklist — what you must be able to do. This is also the audit rubric.

1. Concepts

Read these first. Tick each one when you could explain it to someone else without notes.

0/6

2. Worked example

Choosing a scope setup to catch an intermittent I2C failure

ProblemAn I2C sensor at 400 kHz occasionally fails to respond, maybe once every few thousand transactions. How do you capture the failing transaction?

  1. 1
    Free-running edge trigger will show you thousands of good transactions and you will never see the bad one. You need a trigger that fires only on the fault.
  2. 2
    Characterise the fault: a missing ACK means SDA stays high during the 9th clock pulse of a byte. That is a specific, triggerable condition.
  3. 3
    Option 1 - protocol trigger: many scopes can trigger on 'I2C: missing ACK'. This is the direct answer if your instrument supports it.
  4. 4
    Option 2 - timing trigger: if the failure causes the transaction to take longer, trigger on a pulse width or a timeout on SCL.
  5. 5
    Option 3 - firmware assist: have the microcontroller toggle a spare GPIO when its I2C driver returns an error, and trigger the scope on that GPIO. This is nearly always the fastest route and works on any instrument.
  6. 6
    Set Normal (not Auto) trigger mode and Single-shot acquisition so the capture stays on screen when it fires.
  7. 7
    Set the timebase so the whole transaction fits: a 9-bit byte at 400 kHz is ~22.5 us, so a 100 us window with the trigger positioned at 70% gives you pre-trigger context.
  8. 8
    Probe SCL and SDA with 10x probes and short grounds. Add channel 3 on the error GPIO and channel 4 on the sensor's supply rail — a supply glitch is a common cause and you want it in the same capture.
  9. 9
    Capture, then use the protocol decoder to read the address and data of the failing transaction and the transaction immediately before it.

AnswerTrigger on a firmware-asserted error GPIO in Normal/Single mode, capture SCL, SDA, the error flag and the supply rail together over a 100 us window, and decode. The supply channel is the one most people forget and it is often the answer.

3. Tool demonstration

Capture a real digital bus and decode it, using entirely open-source software.

0/10

Tool: PulseView (sigrok) with a low-cost logic analyser

4. Resources

Free and, wherever possible, openly licensed. The note tells you which part to actually use — do not read them cover to cover.

0/4

5. Project — build this on your own

About 3 hours. This is the artifact that proves the skill. Work it without a walkthrough.

0/11

Produce a measurement report on a running digital system: capture a serial bus, decode it, verify its timing against the specification, and demonstrate one probing artefact you created and then eliminated.

Deliverables

Acceptance criteria — how you know it is good enough

If you want to push further

  • Write a custom sigrok protocol decoder (Python) for a device-specific register map layered over the stock I2C decoder.
  • Capture the same bus with both a logic analyser and a scope simultaneously and identify a signal-integrity problem visible only on the analogue trace.

6. Competence checklist

Tick these honestly. If you are auditing this skill, this is your rubric — you should be able to demonstrate every line from the project you just built.

0/6
Tick every line above first — 6 remaining.