Fabrication and Assembly Outputs

• The output package is the deliverableYour design file is not what gets built. The manufacturing data package is. It must be complete, self-consistent, unambiguous, and versioned. A package that requires an email exchange to interpret has already cost you days.
• Gerber X2 and IPC-2581Classic RS-274X gerbers carry geometry with no meaning attached. Gerber X2 adds attributes: which layer is which, which pad is a via, what the netlist is. IPC-2581 goes further and carries the whole design intent including stackup and netlist in one file. Prefer X2 or IPC-2581 where your fab accepts them; they remove entire classes of misinterpretation.
• The drill file and its coordinate originExcellon drill files must align with the gerbers. The commonest failure is a mismatched origin between the two output sets. Always generate both with the same origin setting, and always verify by loading them together in an independent viewer.
• The IPC-D-356 netlistA netlist export lets the fabricator electrically test the bare board against your intended connectivity, catching etching faults before assembly. It costs nothing to generate and is one of the highest-value files in the package.
• Centroid / pick-and-place dataFor each part: reference designator, X, Y, rotation, layer, and usually the value and package. Rotation conventions differ between EDA tools and assemblers, and rotation errors are the single most common cause of assembly defects. Always provide an assembly drawing showing pin 1 so the assembler can verify.
• Assembly drawings and fabrication drawingsA fabrication drawing carries the stackup, material, finish, tolerances, drill table, board outline dimensions and any special instructions. An assembly drawing shows component outlines, designators, pin-1 markers and any special notes (do not populate, orientation-critical, hand-solder only). These are documents for humans and they are how ambiguity gets removed.
• Surface finish and its consequencesHASL is cheap but leaves an uneven surface, poor for fine pitch. ENIG is flat, solderable, more expensive, and standard for fine-pitch and BGA work. OSP is cheap and flat but has a shelf life and handling constraints. The choice affects assembly yield and must be stated in the fab notes.
• Panelisation and fiducialsSmall boards are assembled in panels. The panel needs tooling holes, fiducials (global and local for fine-pitch parts), breakaway tabs or V-scoring, and edge rails for the conveyor. Decide with your assembler whether you panelise or they do; either way, the fiducials must be on your board.
• Version and traceabilityPut the revision on the silkscreen and in the copper. Name output files with the revision. Keep a manifest listing every file, its purpose and a checksum. When a board arrives and behaves oddly, the first question is always 'which revision is this?', and the silkscreen should answer it.

ProblemYour board is finished and DRC-clean. Produce everything a fabricator and an assembler need.

1. 1
   Decide the fab and assembler first, and read their required file list. Every house has one and they differ. Generating a generic package and hoping is how delays happen.
2. 2
   Gerbers: generate all copper layers, both solder masks, both pastes, both silkscreens, and the board outline (Edge.Cuts). Use Gerber X2 with attributes if the fab accepts it. Set the origin to a defined point (usually the drill/place file origin or the board's lower-left corner) and use the same origin for the drill.
3. 3
   Check the layer list against your stackup: a 4-layer board needs F.Cu, In1.Cu, In2.Cu, B.Cu. Missing an inner layer is a real and costly error that a quick file count catches.
4. 4
   Drill: generate the Excellon file with the same origin. Separate plated and non-plated holes into different files or use the merged format your fab requests. Generate the drill map/report too — it is a human-readable table of hole sizes and counts.
5. 5
   IPC-D-356 netlist: generate it. It costs one menu click and enables bare-board electrical test.
6. 6
   Position file (centroid): generate for both top and bottom, in the units and format your assembler requires. Note the rotation convention and check three or four parts by hand against the assembly drawing.
7. 7
   BOM: generate from the schematic with manufacturer, MPN, quantity, references, and DNP marked, as established in the sourcing skill. Match its revision to the board revision.
8. 8
   Fabrication drawing: a PDF showing the board outline with dimensions, the drill table, the stackup with materials and thicknesses, the surface finish, the copper weight, the solder mask and silkscreen colours, the impedance requirements with their nets, and any special instructions (controlled impedance, edge plating, castellations, tenting requirements).
9. 9
   Assembly drawing: a PDF per side showing component outlines, reference designators, pin-1 indicators, and notes for DNP parts and orientation-critical parts.
10. 10
    Now verify. Load the gerbers and the drill into an independent viewer together. Check that the drill holes land inside their pads on every layer, that the outline is closed, and that inner layers exist and look right.
11. 11
    Verify the netlist file against the design: some viewers can check gerber connectivity against an IPC-D-356 file.
12. 12
    Verify the centroid: pick three parts at random — ideally a two-pin passive, a polarised part and a fine-pitch IC — and check their X, Y and rotation against the assembly drawing by hand.
13. 13
    Package: zip everything with a manifest file listing each file, its purpose, and the design revision. Name the zip with the board name, revision and date.
14. 14
    Final check: upload to the fab's free DFM tool and read every warning.
15. 15
    Keep the exact package that was sent, in version control or in a released-artifacts store. When boards arrive with a problem, you need to know exactly what was manufactured.

AnswerGerbers (X2, all layers, one origin), Excellon drill plus drill map (same origin), IPC-D-356 netlist, centroid for both sides, revision-matched BOM, fabrication drawing with stackup and impedance requirements, assembly drawings with pin-1 markers, all verified in an independent viewer, packaged with a manifest and archived exactly as sent.

Tool: KiCad fabrication outputs plus KiBot automation

• By hand first. File > Fabrication Outputs > Gerbers. Select all required layers. Check 'Use Protel filename extensions' only if your fab wants them. Enable 'Include extended X2 attributes' if supported. Set 'Use drill/place file origin'.
• File > Fabrication Outputs > Drill Files. Set the format (Excellon), the units, and crucially the same origin as the gerbers. Enable the drill map generation.
• File > Fabrication Outputs > Component Placement (.pos). Generate for both sides in CSV.
• File > Fabrication Outputs > IPC-D-356 Netlist File.
• Create the fabrication drawing: add a new page or use a drawing sheet, place the board outline, add dimensions with the dimension tool, and add a text block with the stackup, materials, finish and impedance requirements. Plot to PDF.
• Now automate. Install KiBot (open source, pip installable). Create a .kibot.yaml in your project describing every output: gerbers, drill, position, BOM, PDFs, DRC and ERC reports.
• Run: kibot -c .kibot.yaml -b board.kicad_pcb -e schematic.kicad_sch
• Confirm the generated outputs match what you produced by hand. Where they differ, work out which is right.
• Add DRC and ERC as KiBot preflight steps so the outputs simply will not generate if the design has errors. This is the single most valuable thing in this demo: it makes it impossible to send a broken board to fab.
• Add a compress output to produce the zip with a manifest.
• Put KiBot in CI (GitHub Actions or GitLab CI have published KiCad container images) so every commit produces a full, checked output package as a build artifact.
• Finally, use KiBot's diff feature to compare two revisions' outputs visually. Reviewing a board revision as an image diff of the copper layers is remarkably effective.

• KiCad documentation - plotting and fabrication outputsopen licencedoc~60 minThe plotting chapter covers every output type and its options.
• KiBot - KiCad automationopen licencetool~90 minOpen source. Read the documentation and the example configurations. This turns manufacturing output generation from a checklist into a build step.
• Ucamco - The Gerber Format Specification and X2 guidefreedoc~90 minThe format's custodian publishes the specification and several free guides on what a good gerber package looks like. The 'Gerber layer format specification' and their PCB fabrication data guide are both worth reading.
• Fabricator and assembler file requirement pagesfreereference~45 minRead the actual requirements of the house you will use: file naming, centroid format, rotation convention, BOM columns. Free and specific.

Produce, verify and automate a complete manufacturing data package for your board, targeted at a named real fabricator and assembler, good enough to order without further questions.

Deliverables

• A complete output package: gerbers for every layer, Excellon drill with map, IPC-D-356 netlist, centroid files for both sides, revision-matched BOM, fabrication drawing PDF and assembly drawing PDFs.
• A named target fabricator and assembler, with their published file requirements quoted and a checklist showing your package satisfies each one.
• A fabrication drawing containing at minimum: dimensioned board outline, drill table, stackup with materials and dielectric thicknesses, copper weights, surface finish, mask and silk colours, impedance requirements with the nets they apply to, and any special instructions.
• Assembly drawings for both sides showing designators, outlines, pin-1 markers, DNP parts marked, and notes for orientation-critical components.
• An independent verification report: screenshots from a non-KiCad gerber viewer with drill overlaid, confirming registration, layer completeness, closed outline and correct mask openings, with a written check per layer.
• A centroid spot-check: three components verified by hand for position and rotation against the assembly drawing, with the rotation convention stated.
• A KiBot configuration that regenerates the entire package, with DRC and ERC as preflight steps that block output generation on failure, plus evidence of it running successfully.
• A manifest file listing every deliverable with its purpose and a checksum, and the package archived under its revision.
• A DFM report from the fabricator's free upload tool with every warning addressed or explicitly accepted in writing.
• A revision marking check: evidence that the revision appears on the silkscreen and in the copper.

Acceptance criteria — how you know it is good enough

• Every layer in the stackup is present in the gerber set; layer count matches the design.
• The drill file registers correctly with the copper in an independent viewer.
• The IPC-D-356 netlist is included.
• Centroid rotation convention is stated and three parts are hand-verified.
• The fabrication drawing contains the stackup and impedance requirements.
• KiBot regenerates the package and blocks on DRC or ERC failure, demonstrated.
• Every DFM warning is addressed or accepted with a reason.
• The board revision is visible on the physical board.

If you want to push further

• Panelise the board with breakaway tabs and fiducials, produce the panel drawing, and calculate the panel utilisation percentage.
• Produce an IPC-2581 output as well as gerbers and compare what information each carries.

• I generate a complete output package targeted at a specific fabricator's requirements.
• I verify gerbers and drill together in an independent viewer before ordering.
• I include an IPC-D-356 netlist for bare-board test.
• I produce fabrication and assembly drawings that remove ambiguity for humans.
• I state the centroid rotation convention and spot-check it.
• I automate output generation with DRC and ERC as blocking preflight checks.
• I mark the revision on the board and archive exactly what was sent.