Transistors as Switches

• BJT: current-controlled, MOSFET: voltage-controlledA BJT needs continuous base current proportional to collector current (Ic = beta x Ib), and saturates with a Vce(sat) of 0.1-0.3 V. A MOSFET needs only gate voltage and, once fully enhanced, behaves as a resistor Rds(on). For DC switching MOSFETs almost always win; BJTs still earn their place in level shifting and small signal work.For a BJT switch, drive Ib = Ic / 10 (not Ic/beta) to guarantee saturation over temperature and part spread.
• Vgs(th) is a lie you must not design toThe threshold voltage is where the MOSFET begins to conduct microamps — not where it is on. You must read the Rds(on) table and use the value guaranteed at the Vgs you can actually supply. A 'logic level' MOSFET is one specified at Vgs = 4.5 V; a true 3.3 V design needs one specified at 2.5 V.Design to Rds(on) @ your actual Vgs, from the datasheet's guaranteed max column, at the highest expected temperature.
• Low-side vs high-side switchingLow-side (device between load and ground) is easy: the source is at ground, so gate drive is referenced to ground. High-side (device between supply and load) needs the gate driven above the supply for an N-channel, which is why you either use a P-channel with an inverting drive stage, or a bootstrap/charge-pump gate driver.
• Gate charge, gate resistors and switching lossA MOSFET's gate is a capacitor of a few nanofarads. Turning it on fast needs a current spike; turning it on slowly means it spends longer in the linear region dissipating real power. The gate resistor sets that trade-off, and also damps ringing against parasitic inductance.Switching loss ~ 0.5 x Vds x Id x (t_rise + t_fall) x f_sw. Conduction loss = Id^2 x Rds(on) x duty.
• Pull-down resistors and safe statesA floating gate is an antenna and will turn the device partially on. Every MOSFET gate needs a defined state during reset and before the microcontroller's pins are configured. A 10 k to 100 k pull-down (N-channel low-side) or pull-up (P-channel high-side) is mandatory, not optional.
• Thermal: junction to ambient is the real limitThe device survives if Tj stays under its maximum. Tj = Ta + P x Rth(j-a). For an SOT-23 part with Rth(j-a) of 250 C/W, dissipating 0.4 W in a 25 C room already puts the junction at 125 C. Copper area is the heatsink on a PCB.Tj = Ta + P_total x Rth(j-a). Keep Tj below 80% of Tj(max).

ProblemA 3.3 V microcontroller GPIO must PWM a 12 V LED strip drawing 1 A at 1 kHz. Choose a MOSFET and design the drive.

1. 1
   Topology: low-side N-channel. Drain to the strip's negative terminal, source to ground, gate to the GPIO.
2. 2
   Gate drive available: 3.3 V. So we need Rds(on) specified at Vgs = 2.5 V or lower. This rules out most 'standard' MOSFETs specified only at 10 V.
3. 3
   Candidate: a logic-level part with Rds(on) max = 40 milliohm at Vgs = 2.5 V (check a real datasheet; many small SOT-23 parts qualify).
4. 4
   Conduction loss at 100% duty: P = I^2 x R = 1^2 x 0.040 = 40 mW. Comfortable.
5. 5
   But Rds(on) rises with temperature, roughly +0.4%/C for silicon. At 100 C junction: 0.040 x (1 + 0.004 x 75) = 52 milliohm. P = 52 mW. Still fine.
6. 6
   Switching loss: at 1 kHz with, say, 200 ns transitions: P = 0.5 x 12 x 1 x 400e-9 x 1000 = 2.4 mW. Negligible at this frequency.
7. 7
   Gate resistor: gate charge Qg = 5 nC (typical small part). Without a resistor the GPIO would try to source Qg/t. A 100 ohm series resistor limits peak gate current to 3.3/100 = 33 mA, within GPIO limits, and gives a turn-on time of roughly Rg x Ciss ~ 100 x 500 pF = 50 ns. Acceptable.
8. 8
   Gate pull-down: 100 k from gate to source, so the strip is off while the MCU is in reset.
9. 9
   Thermal: total 55 mW in an SOT-23 with Rth(j-a) = 250 C/W gives a 14 C rise. Tj = 25 + 14 = 39 C. Safe with large margin.
10. 10
    The LED strip is not purely resistive but it is not inductive either, so no flyback diode is needed. If this were a motor or relay, one would be mandatory.

AnswerLogic-level N-channel MOSFET with Rds(on) <= 50 milliohm at Vgs = 2.5 V, 30 V Vds rating minimum. 100 ohm gate series resistor, 100 k gate-source pull-down. Total dissipation 55 mW, junction 39 C.

Tool: ngspice with a real MOSFET SPICE model

• Find a manufacturer SPICE model for a logic-level MOSFET (most vendors publish .lib or .mod files free on the part page). Save it as mosfet.lib.
• Create switch.cir:

  Low-side MOSFET switch
  .include mosfet.lib
  V1 vdd 0 DC 12
  Rload vdd d 12
  M1 d g 0 0 <MODELNAME>
  Rg gate g 100
  Rpd g 0 100k
  Vgpio gate 0 PULSE(0 3.3 0 20n 20n 500u 1m)
  .tran 100n 3m
  .end

• Replace <MODELNAME> with the subcircuit or model name from the vendor file (use .include plus X1 if it is a subcircuit).
• Run and: plot v(d) v(g) — see the gate ramp and the drain fall.
• Measure the on-state drain voltage: meas tran vds_on AVG v(d) FROM=400u TO=450u. Divide by the load current to get the effective Rds(on) and compare to the datasheet.
• Compute instantaneous dissipation: plot v(d)*i(Rload) — observe the loss spikes at each transition.
• Change Rg from 100 to 1k. Re-run. The transitions widen and the loss spikes grow. Quantify the difference.
• Change Vgpio's high level from 3.3 to 2.0 V. Observe the device failing to fully enhance and Vds rising. This is the Vgs(th) trap made visible.

• Semiconductor Devices (Fiore) - BJT and FET chaptersopen licencereading~180 minRead the BJT biasing/switching and the JFET/MOSFET chapters. Focus on the switching sections; small-signal amplifier biasing can wait.
• All About Circuits - Solid-state Device Theory / Transistorsfreereading~60 minThe BJT-as-switch and saturation discussion is particularly clear.
• Toshiba / onsemi MOSFET gate drive application notesfreereference~60 minSearch for 'MOSFET gate drive' and 'power dissipation calculation'. Manufacturer app notes are the best free source on gate charge and switching loss.
• A real logic-level MOSFET datasheet (e.g. AO3400, DMN3013, BSS138)freedatasheet~30 minOpen one and find: Vds max, Id continuous (and the conditions), Rds(on) at each Vgs, Qg, Ciss, Rth(j-a). The conditions matter more than the headline numbers.

Design a three-channel load driver board on paper: channel 1 is a 12 V/2 A resistive heater, channel 2 is a 12 V relay coil, channel 3 is a 5 V/500 mA brushed motor under 20 kHz PWM. All are commanded by a 3.3 V microcontroller.

Deliverables

• A device selection table: for each channel, the chosen MOSFET (real part number) with Vds, Id, Rds(on) at 2.5 V and 3.3 V Vgs, Qg and Rth(j-a) quoted from its datasheet.
• A full loss budget per channel: conduction loss at the hottest expected junction temperature, switching loss at the operating frequency, gate drive loss, and the resulting junction temperature at 40 C ambient.
• A gate drive design per channel: series resistor value with the peak GPIO current calculated, pull-down value, and a statement of the turn-on time.
• A protection review: which channels need a flyback diode and why, with a specific part chosen for each.
• An identification of which channel, if any, cannot be driven directly from a 3.3 V GPIO, and a concrete fix (gate driver IC or a BJT/MOSFET pre-driver stage) with the extra part specified.
• An ngspice simulation of the worst-case channel showing gate, drain and instantaneous power waveforms.

Acceptance criteria — how you know it is good enough

• Rds(on) is taken from the guaranteed maximum column at the actual available Vgs, never at 10 V.
• Every loss budget includes the temperature coefficient of Rds(on), not just the 25 C figure.
• Junction temperature is calculated for every channel and every result is below 80% of Tj(max).
• Every gate has a defined state when the MCU is in reset.
• The inductive channels have a specified freewheeling path.
• The 2 A heater channel's PCB copper area requirement is at least mentioned, if not calculated.

If you want to push further

• Add current sensing to the heater channel with a shunt resistor, and calculate the shunt value, its power dissipation and the amplifier gain needed for a 0-3.3 V ADC input.
• Redesign the motor channel as a high-side P-channel switch and compare the part cost, drive complexity and losses.

• I can choose between a BJT and a MOSFET for a switching job and justify it.
• I never design to Vgs(th); I use the guaranteed Rds(on) at my actual gate voltage.
• I can calculate conduction and switching loss and convert them to a junction temperature.
• I can design a gate drive network including the series resistor and the safe-state pull.
• I can explain why high-side N-channel switching needs a bootstrap or charge pump.
• I always give inductive loads a freewheeling path and can size the diode.